Impact of Source-Level Loop Optimization on DSP Architecture Design
نویسندگان
چکیده
How to select an architecture which has better performance cost ratio, how to design a balanced architecture which can fit most DSP programs and how to generate a custom-fit DSP processor are important topics now. This paper presents a novel methodology based on source-level loop optimization which can avoid expensive retargetable compiler and simulator, and exhaustive experiments.
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